* gnu/packages/patches/guile-arm-fixes.patch: New file. * gnu-system.am (dist_patch_DATA): Add it. * gnu/packages/guile.scm (guile-2.0): Add patch.
		
			
				
	
	
		
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			203 lines
		
	
	
	
		
			7.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
Apply fixes for ARM to Guile.
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From df8c52e93dfa3965e4714275f4b8cea2c8e0170b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ludovic=20Court=C3=A8s?= <ludo@gnu.org>
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Date: Fri, 4 Jul 2014 15:35:06 +0200
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Subject: [PATCH] Recognize arm-* target triplets.
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Reported by Sylvain Beucler <beuc@beuc.net>.
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* module/system/base/target.scm (cpu-endianness): Add case where CPU is
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  "arm".
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* test-suite/tests/asm-to-bytecode.test ("cross-compilation")["arm-unknown-linux-androideabi"]:
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  New test.
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---
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 module/system/base/target.scm         | 4 +++-
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 test-suite/tests/asm-to-bytecode.test | 5 ++++-
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 2 files changed, 7 insertions(+), 2 deletions(-)
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diff --git a/module/system/base/target.scm b/module/system/base/target.scm
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index c74ae67..cefa951 100644
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--- a/module/system/base/target.scm
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+++ b/module/system/base/target.scm
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@@ -1,6 +1,6 @@
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 ;;; Compilation targets
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-;; Copyright (C) 2011, 2012, 2013 Free Software Foundation, Inc.
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+;; Copyright (C) 2011, 2012, 2013, 2014 Free Software Foundation, Inc.
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 ;; This library is free software; you can redistribute it and/or
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 ;; modify it under the terms of the GNU Lesser General Public
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@@ -72,6 +72,8 @@
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              (endianness big))
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             ((string-match "^arm.*el" cpu)
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              (endianness little))
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+            ((string=? "arm" cpu)                ;ARMs are LE by default
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+             (endianness little))
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             (else
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              (error "unknown CPU endianness" cpu)))))
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diff --git a/test-suite/tests/asm-to-bytecode.test b/test-suite/tests/asm-to-bytecode.test
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index 6d2f20e..62ea0ed 100644
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--- a/test-suite/tests/asm-to-bytecode.test
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+++ b/test-suite/tests/asm-to-bytecode.test
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@@ -1,6 +1,6 @@
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 ;;;; Assembly to bytecode compilation -*- mode: scheme; coding: utf-8; -*-
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 ;;;;
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-;;;; 	Copyright (C) 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
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+;;;; 	Copyright (C) 2010, 2011, 2012, 2013, 2014 Free Software Foundation, Inc.
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 ;;;;
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 ;;;; This library is free software; you can redistribute it and/or
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 ;;;; modify it under the terms of the GNU Lesser General Public
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@@ -205,6 +205,9 @@
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   (test-target "x86_64-unknown-linux-gnux32"      ; x32 ABI (Debian tuplet)
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                (endianness little) 4)
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+  (test-target "arm-unknown-linux-androideabi"
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+               (endianness little) 4)
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+
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   (pass-if-exception "unknown target"
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     exception:miscellaneous-error
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     (call-with-values (lambda ()
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-- 
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2.1.2
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From ffd3e55cfd12a3559621e3130d613d319243512d Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ludovic=20Court=C3=A8s?= <ludo@gnu.org>
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Date: Fri, 4 Jul 2014 17:26:41 +0200
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Subject: [PATCH] Recognize more ARM targets.
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Suggested by Dale P. Smith.
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* module/system/base/target.scm (cpu-endianness): Add cases for
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  "arm.*eb", "^aarch64.*be", and "aarch64".  Change "arm" case to
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  "arm.*".
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  (triplet-pointer-size): Allow underscore as in 'aarch64_be'.
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* test-suite/tests/asm-to-bytecode.test ("cross-compilation")["armeb-unknown-linux-gnu",
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  "aarch64-linux-gnu", "aarch64_be-linux-gnu"]: New tests.
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---
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 module/system/base/target.scm         | 10 ++++++++--
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 test-suite/tests/asm-to-bytecode.test |  6 ++++++
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 2 files changed, 14 insertions(+), 2 deletions(-)
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diff --git a/module/system/base/target.scm b/module/system/base/target.scm
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index cefa951..31e3fea 100644
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--- a/module/system/base/target.scm
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+++ b/module/system/base/target.scm
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@@ -72,7 +72,13 @@
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              (endianness big))
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             ((string-match "^arm.*el" cpu)
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              (endianness little))
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-            ((string=? "arm" cpu)                ;ARMs are LE by default
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+            ((string-match "^arm.*eb" cpu)
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+             (endianness big))
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+            ((string-prefix? "arm" cpu)          ;ARMs are LE by default
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+             (endianness little))
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+            ((string-match "^aarch64.*be" cpu)
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+             (endianness big))
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+            ((string=? "aarch64" cpu)
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              (endianness little))
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             (else
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              (error "unknown CPU endianness" cpu)))))
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@@ -97,7 +103,7 @@
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           ((string-match "^x86_64-.*-gnux32" triplet) 4)  ; x32
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           ((string-match "64$" cpu) 8)
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-          ((string-match "64[lbe][lbe]$" cpu) 8)
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+          ((string-match "64_?[lbe][lbe]$" cpu) 8)
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           ((member cpu '("sparc" "powerpc" "mips" "mipsel")) 4)
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           ((string-match "^arm.*" cpu) 4)
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           (else (error "unknown CPU word size" cpu)))))
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diff --git a/test-suite/tests/asm-to-bytecode.test b/test-suite/tests/asm-to-bytecode.test
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index 62ea0ed..8aeba84 100644
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--- a/test-suite/tests/asm-to-bytecode.test
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+++ b/test-suite/tests/asm-to-bytecode.test
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@@ -207,6 +207,12 @@
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   (test-target "arm-unknown-linux-androideabi"
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                (endianness little) 4)
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+  (test-target "armeb-unknown-linux-gnu"
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+               (endianness big) 4)
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+  (test-target "aarch64-linux-gnu"
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+               (endianness little) 8)
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+  (test-target "aarch64_be-linux-gnu"
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+               (endianness big) 8)
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   (pass-if-exception "unknown target"
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     exception:miscellaneous-error
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-- 
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2.1.2
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From a85c78ea1393985fdb6e6678dea19135c553d341 Mon Sep 17 00:00:00 2001
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From: Mark H Weaver <mhw@netris.org>
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Date: Fri, 19 Sep 2014 21:18:09 -0400
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Subject: [PATCH] VM: ASM_MUL for ARM: Add earlyclobber constraint to the SMULL
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 outputs.
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Reported by Rob Browning <rlb@defaultvalue.org>.
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* libguile/vm-i-scheme.c (ASM_MUL)[ARM]: Add earlyclobber (&) constraint
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  to the SMULL output registers.
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---
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 libguile/vm-i-scheme.c | 5 ++---
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 1 file changed, 2 insertions(+), 3 deletions(-)
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diff --git a/libguile/vm-i-scheme.c b/libguile/vm-i-scheme.c
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index 587aa95..162efab 100644
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--- a/libguile/vm-i-scheme.c
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+++ b/libguile/vm-i-scheme.c
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@@ -1,5 +1,4 @@
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-/* Copyright (C) 2001, 2009, 2010, 2011, 2012, 2013,
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- *   2014 Free Software Foundation, Inc.
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+/* Copyright (C) 2001, 2009-2014 Free Software Foundation, Inc.
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  * 
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  * This library is free software; you can redistribute it and/or
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  * modify it under the terms of the GNU Lesser General Public License
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@@ -363,7 +362,7 @@ VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
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       {									\
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 	scm_t_signed_bits rlo, rhi;					\
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 	asm ("smull %0, %1, %2, %3\n"					\
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-	     : "=r" (rlo), "=r" (rhi)					\
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+	     : "=&r" (rlo), "=&r" (rhi)					\
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 	     : "r" (SCM_UNPACK (x) - scm_tc2_int),			\
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 	       "r" (SCM_I_INUM (y)));					\
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 	if (SCM_LIKELY (SCM_SRS (rlo, 31) == rhi))			\
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-- 
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2.1.2
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From bed025bd2569b1c033f24d7d9e660e39ebf65cac Mon Sep 17 00:00:00 2001
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From: Mark H Weaver <mhw@netris.org>
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Date: Sat, 20 Sep 2014 03:59:51 -0400
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Subject: [PATCH] VM: Allow the C compiler to choose FP_REG on ARM.
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Reported by Rob Browning <rlb@defaultvalue.org>.
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* libguile/vm-engine.h (IP_REG)[__arm__]: Remove explicit register
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  choice ("r7") for FP_REG, which was reported to cause compilation
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  failures on ARM.
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---
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 libguile/vm-engine.h | 4 ++--
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 1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/libguile/vm-engine.h b/libguile/vm-engine.h
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index 46d4cff..e618be7 100644
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--- a/libguile/vm-engine.h
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+++ b/libguile/vm-engine.h
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@@ -1,4 +1,4 @@
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-/* Copyright (C) 2001, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
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+/* Copyright (C) 2001, 2009-2012, 2014 Free Software Foundation, Inc.
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  * 
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  * This library is free software; you can redistribute it and/or
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  * modify it under the terms of the GNU Lesser General Public License
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@@ -81,7 +81,7 @@
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 #ifdef __arm__
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 #define IP_REG asm("r9")
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 #define SP_REG asm("r8")
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-#define FP_REG asm("r7")
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+#define FP_REG
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 #endif
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 #endif
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-- 
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2.1.2
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