adf7e69cab
* gnu/packages/patches/qemu-CVE-2017-15038.patch, gnu/packages/patches/qemu-CVE-2017-15268.patch, gnu/packages/patches/qemu-CVE-2017-15289.patch: New files. * gnu/local.mk (dist_patch_DATA): Add them. * gnu/packages/virtualization.scm (qemu)[source]: Use them.
66 lines
2.1 KiB
Diff
66 lines
2.1 KiB
Diff
Fix CVE-2017-15289:
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https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-15289
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Patch copied from upstream source repository:
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https://git.qemu.org/?p=qemu.git;a=commitdiff;h=eb38e1bc3740725ca29a535351de94107ec58d51
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From eb38e1bc3740725ca29a535351de94107ec58d51 Mon Sep 17 00:00:00 2001
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Wed, 11 Oct 2017 10:43:14 +0200
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Subject: [PATCH] cirrus: fix oob access in mode4and5 write functions
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Move dst calculation into the loop, so we apply the mask on each
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interation and will not overflow vga memory.
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Cc: Prasad J Pandit <pjp@fedoraproject.org>
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Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Message-id: 20171011084314.21752-1-kraxel@redhat.com
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---
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hw/display/cirrus_vga.c | 6 ++----
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1 file changed, 2 insertions(+), 4 deletions(-)
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diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
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index b4d579857a..bc32bf1e39 100644
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--- a/hw/display/cirrus_vga.c
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+++ b/hw/display/cirrus_vga.c
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@@ -2038,15 +2038,14 @@ static void cirrus_mem_writeb_mode4and5_8bpp(CirrusVGAState * s,
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unsigned val = mem_value;
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uint8_t *dst;
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- dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask);
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for (x = 0; x < 8; x++) {
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+ dst = s->vga.vram_ptr + ((offset + x) & s->cirrus_addr_mask);
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if (val & 0x80) {
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*dst = s->cirrus_shadow_gr1;
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} else if (mode == 5) {
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*dst = s->cirrus_shadow_gr0;
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}
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val <<= 1;
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- dst++;
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}
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memory_region_set_dirty(&s->vga.vram, offset, 8);
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}
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@@ -2060,8 +2059,8 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s,
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unsigned val = mem_value;
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uint8_t *dst;
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- dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask);
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for (x = 0; x < 8; x++) {
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+ dst = s->vga.vram_ptr + ((offset + 2 * x) & s->cirrus_addr_mask & ~1);
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if (val & 0x80) {
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*dst = s->cirrus_shadow_gr1;
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*(dst + 1) = s->vga.gr[0x11];
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@@ -2070,7 +2069,6 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s,
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*(dst + 1) = s->vga.gr[0x10];
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}
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val <<= 1;
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- dst += 2;
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}
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memory_region_set_dirty(&s->vga.vram, offset, 16);
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}
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--
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2.15.0
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